Direct memory access (DMA) operations can be used to rapidly transfer large amounts of data to/from memory and peripherals. The DMA engine is an agent residing (at least functionally, if not physically) between the processor core and physical memory/peripheral input-output devices. During conventional DMA activity, the DMA engine operates to transfer data, leaving the central processing unit (CPU) free to perform other tasks.
The memory management unit (MMU) typically translates virtual memory addresses to physical memory addresses. An operating system (OS) environment typically requires the MMU to operate in virtual mode. However, some architectures lack the ability for the DMA engine to communicate directly with the MMU for address translation purposes (e.g., system-on-chip (SoC) ARM® architectures implementing a gather/scatter operation), such that DMA activity is limited to physical addresses. In these cases, data is typically copied from application buffers to driver buffers having known physical addresses prior to initiating a DMA operation. However, if the DMA buffers are relatively large, a significant amount of time may be required to copy the data, precluding the execution of other tasks. Improved apparatus, systems, and methods for conducting DMA operations in these instances are needed.